The present disclosure relates to an alignment key, a method for fabricating the alignment key, and a method for fabricating a thin film transistor substrate using the alignment key.
A liquid crystal display (LCD) device includes two transparent substrates facing each other and a liquid crystal layer formed between the transparent substrates. When a voltage is applied to electrodes disposed on the respective substrates, liquid crystal molecules of the liquid crystal layer are realigned to display an image.
The LCD device is fabricated through a variety of processes such as a substrate cleaning process, a thin film patterning process, an alignment layer forming/rubbing process, a substrate combining/liquid crystal injection process, an inspection process, a repairing process, a mounting process, and the like.
The thin film patterning process is performed to form a variety of elements and driving lines on upper and lower transparent substrates. Describing a patterning process for the upper substrate (i.e., thin film transistor substrate), after a gate electrode is formed on a base substrate, a gate dielectric is formed on the base substrate. Subsequently, a semiconductor layer is formed on the gate dielectric, after which source and drain electrodes, a passivation layer, and a pixel electrode are sequentially formed.
When patterns for the gate electrode, semiconductor layer, source and drain electrodes, and pixel electrode are sequentially formed, an alignment key on the base substrate is used to accurately align the respective patterns.
However, when the alignment key is formed, a forming error of the alignment key occurs and thus the respective patterns formed on the substrate are designed to have predetermined margins. That is, if an allowable forming error of the alignment key is 0.5 μm, the design patterns of the gate electrode, semiconductor layer, source and drain electrodes, and pixel electrode have design margins of 1-1.5 μm that can cover the allowable forming error.
As the design margins of the gate electrode, semiconductor layer, source and drain electrodes, and pixel electrode are reduced, a liquid crystal cell is more finely and accurately formed. Therefore, it will be preferable that the allowable forming error of the alignment key is reduced.
However, some alignment key forming methods make it difficult to reduce the forming error of the alignment key. For instance, when the alignment key and the thin film pattern are formed through a printing process so as to simplify the process, as shown in FIG. 1, an actual forming location of the alignment key 4b may differ from a forming location of a designed mark pattern 4a of the alignment key.
That is, since a printing roll 8 moves on the mask during a resist pattern forming process, being applied with a predetermined pressure, the alignment key 4b is shifted. This causes the difference between the actual forming location of the alignment key 4b and the forming location of a designed mark pattern 4a of the alignment key.
When the alignment key is formed through the printing process, the actual alignment key may be misaligned with a designed pattern by up to 10 μm.
When the respective patterns are formed based on the alignment key, a forming error for each of the pattern occurs. The forming error of the patterns is gradually increased as it goes to patterns that are formed after the gate electrode, semiconductor layer, source and drain electrodes, and pixel electrode are formed.
Particularly, when there is a forming error between the data line and the gate electrode, this may cause a crosstalk. The crosstalk is caused by a parasitic capacitance difference by a deviation between the data line and the pixel electrode of the adjacent pixels.
Therefore, there is a need for a device that can reduce the forming error of the alignment key.